Optimum bias of power transistor in 0.18 lm CMOS technology for Bluetooth application

Based on the proposed silicon integrated power transistor adopting a 0.18 lm technology, its performance shows this novel device can be operated at 2.4 GHz for Bluetooth and lithium battery applications [Hsu H-M, Su J-G, Chen C-W, Tang DD, Chen CH, Sun JY-C. Integrated power transistor in 0.18 lm CMOS technology for RF system-on-chip applications. IEEE Trans Microwave Theory Tech 2002;50(December):2873–81]. After executing matrix measurement of large-signal characteristics, the optimal quiescent point can be found, and the associated large-signal performance exhibits a maximum output power with 21.26 dBm, corresponding to a value of 44.3% for power added efficiency (PAE). Therefore, this device can be used in handholds for short-distance, low-power, and high-frequency operation. 2006 Elsevier Ltd. All rights reserved.